Switchtec Userspace PROJECT_NUMBER = 4.0
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gasops.c
1/*
2 * Microsemi Switchtec(tm) PCIe Management Library
3 * Copyright (c) 2017, Microsemi Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included
13 * in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25#include "gasops.h"
26#include "switchtec/gas.h"
27#include "../switchtec_priv.h"
28#include "switchtec/utils.h"
29
30#include <errno.h>
31#include <stddef.h>
32#include <string.h>
33#include <unistd.h>
34#include <sys/time.h>
35
36#define gas_reg_read8(dev, reg) __gas_read8(dev, &dev->gas_map->reg)
37#define gas_reg_read16(dev, reg) __gas_read16(dev, &dev->gas_map->reg)
38#define gas_reg_read32(dev, reg) __gas_read32(dev, &dev->gas_map->reg)
39#define gas_reg_read64(dev, reg) __gas_read64(dev, &dev->gas_map->reg)
40
41#define gas_reg_write8(dev, val, reg) __gas_write8(dev, val, \
42 &dev->gas_map->reg)
43#define gas_reg_write16(dev, val, reg) __gas_write16(dev, val, \
44 &dev->gas_map->reg)
45#define gas_reg_write32(dev, val, reg) __gas_write32(dev, val, \
46 &dev->gas_map->reg)
47#define gas_reg_write64(dev, val, reg) __gas_write64(dev, val, \
48 &dev->gas_map->reg)
49
51 int no_retry;
52 int num_subcmd;
53 int *subcmds;
54};
55static int fw_toggle_noretry_subcmds[] = {
56 MRPC_FW_TX_TOGGLE,
57};
58static const struct no_retry_struct gasop_noretry_cmds[] = {
59 [MRPC_SECURITY_CONFIG_SET] = {1, 0, NULL},
60 [MRPC_KMSK_ENTRY_SET] = {1, 0, NULL},
61 [MRPC_SECURE_STATE_SET] = {1, 0, NULL},
62 [MRPC_BOOTUP_RESUME] = {1, 0, NULL},
63 [MRPC_DBG_UNLOCK] = {1, 0, NULL},
64 [MRPC_SECURITY_CONFIG_SET_GEN5] = {1, 0, NULL},
65 [MRPC_FW_TX] = {1, 1, fw_toggle_noretry_subcmds},
66};
67static const int gasop_noretry_cmds_count = sizeof(gasop_noretry_cmds) /
68 sizeof(char);
69
70static inline bool gasop_is_no_retry_cmd(uint32_t cmd, int subcmd)
71{
72 int i;
73
74 cmd &= SWITCHTEC_CMD_MASK;
75
76 if (cmd >= gasop_noretry_cmds_count)
77 return 0;
78 if (gasop_noretry_cmds[cmd].no_retry == 0)
79 return 0;
80 if (gasop_noretry_cmds[cmd].num_subcmd == 0)
81 return 1;
82 for (i = 0; i < gasop_noretry_cmds[cmd].num_subcmd; i++) {
83 if (subcmd == gasop_noretry_cmds[cmd].subcmds[i])
84 return 1;
85 }
86
87 return 0;
88}
89
90int gasop_access_check(struct switchtec_dev *dev)
91{
92 uint32_t device_id;
93
94 device_id = gas_reg_read32(dev, sys_info.device_id);
95 if (device_id == -1)
96 return -1;
97 return 0;
98}
99
100void gasop_set_partition_info(struct switchtec_dev *dev)
101{
102 dev->partition = gas_reg_read8(dev, top.partition_id);
103 dev->partition_count = gas_reg_read8(dev, top.partition_count);
104}
105
106int gasop_cmd(struct switchtec_dev *dev, uint32_t cmd,
107 const void *payload, size_t payload_len, void *resp,
108 size_t resp_len)
109{
110 struct mrpc_regs __gas *mrpc = &dev->gas_map->mrpc;
111 int status;
112 int ret;
113 uint8_t subcmd = 0xff;
114
115 __memcpy_to_gas(dev, &mrpc->input_data, payload, payload_len);
116
117 /* Due to the possible unreliable nature of hardware
118 * communication, function __gas_write32() is implemented
119 * with automatic retry.
120 *
121 * This poses a potential issue when a command is critical
122 * and is expected to be sent only once (e.g., command that
123 * adds a KMSK entry to chip OTP memory). Retrying could
124 * cause the command be sent multiple times (and multiple
125 * KMSK entry being added, if unlucky).
126 *
127 * Here we filter out the specific commands and use 'no retry'
128 * version of gas_write32 for these commands.
129 */
130 if (payload)
131 subcmd = *(uint8_t*)payload;
132 if (gasop_is_no_retry_cmd(cmd, subcmd))
133 __gas_write32_no_retry(dev, cmd, &mrpc->cmd);
134 else
135 __gas_write32(dev, cmd, &mrpc->cmd);
136
137 while (1) {
138 usleep(5000);
139
140 status = __gas_read32(dev, &mrpc->status);
141 if (status != SWITCHTEC_MRPC_STATUS_INPROGRESS)
142 break;
143 }
144
145 if (status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) {
146 errno = ENXIO;
147 return -errno;
148 }
149
150 if(status == SWITCHTEC_MRPC_STATUS_ERROR) {
151 errno = __gas_read32(dev, &mrpc->ret_value);
152 return errno;
153 }
154
155 if (status != SWITCHTEC_MRPC_STATUS_DONE) {
156 errno = ENXIO;
157 return -errno;
158 }
159
160 ret = __gas_read32(dev, &mrpc->ret_value);
161 if (ret)
162 errno = ret;
163
164 if(resp)
165 __memcpy_from_gas(dev, resp, &mrpc->output_data, resp_len);
166
167 return ret;
168}
169
170int gasop_get_device_id(struct switchtec_dev *dev)
171{
172 return gas_reg_read32(dev, sys_info.device_id);
173}
174
175int gasop_get_fw_version(struct switchtec_dev *dev, char *buf,
176 size_t buflen)
177{
178 long long ver;
179
180 ver = gas_reg_read32(dev, sys_info.firmware_version);
181 version_to_string(ver, buf, buflen);
182
183 return 0;
184}
185
186int gasop_pff_to_port(struct switchtec_dev *dev, int pff,
187 int *partition, int *port)
188{
189 int i, part;
190 uint32_t reg;
191 struct part_cfg_regs __gas *pcfg;
192
193 *port = -1;
194
195 for (part = 0; part < dev->partition_count; part++) {
196 pcfg = &dev->gas_map->part_cfg[part];
197 *partition = part;
198
199 reg = __gas_read32(dev, &pcfg->usp_pff_inst_id);
200 if (reg == pff) {
201 *port = 0;
202 return 0;
203 }
204
205 reg = __gas_read32(dev, &pcfg->vep_pff_inst_id);
206 if (reg == pff) {
207 *port = SWITCHTEC_PFF_PORT_VEP;
208 return 0;
209 }
210
211 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
212 reg = __gas_read32(dev, &pcfg->dsp_pff_inst_id[i]);
213 if (reg != pff)
214 continue;
215
216 *port = i + 1;
217 break;
218 }
219
220 if (*port != -1)
221 return 0;
222 }
223
224 errno = EINVAL;
225 return -EINVAL;
226}
227
228int gasop_port_to_pff(struct switchtec_dev *dev, int partition,
229 int port, int *pff)
230{
231 struct part_cfg_regs __gas *pcfg;
232
233 if (partition < 0) {
234 partition = dev->partition;
235 } else if (partition >= dev->partition_count) {
236 errno = EINVAL;
237 return -errno;
238 }
239
240 pcfg = &dev->gas_map->part_cfg[partition];
241
242 switch (port) {
243 case 0:
244 *pff = __gas_read32(dev, &pcfg->usp_pff_inst_id);
245 break;
246 case SWITCHTEC_PFF_PORT_VEP:
247 *pff = __gas_read32(dev, &pcfg->vep_pff_inst_id);
248 break;
249 default:
250 if (port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) {
251 errno = EINVAL;
252 return -errno;
253 }
254
255 *pff = __gas_read32(dev, &pcfg->dsp_pff_inst_id[port - 1]);
256 break;
257 }
258
259 return 0;
260}
261
262static void set_fw_info_part(struct switchtec_dev *dev,
263 struct switchtec_fw_image_info *info,
264 struct partition_info __gas *pi)
265{
266 info->part_addr = __gas_read32(dev, &pi->address);
267 info->part_len = __gas_read32(dev, &pi->length);
268}
269
270int gasop_flash_part(struct switchtec_dev *dev,
271 struct switchtec_fw_image_info *info,
272 enum switchtec_fw_image_part_id_gen3 part)
273{
274 struct flash_info_regs __gas *fi = &dev->gas_map->flash_info;
275 struct sys_info_regs __gas *si = &dev->gas_map->sys_info;
276 uint32_t active_addr = -1;
277 int val;
278
279 info->running = false;
280 info->active = false;
281
282 switch (part) {
283 case SWITCHTEC_FW_PART_ID_G3_IMG0:
284 active_addr = __gas_read32(dev, &fi->active_img.address);
285 set_fw_info_part(dev, info, &fi->img0);
286
287 val = __gas_read16(dev, &si->img_running);
288 if (val == SWITCHTEC_IMG0_RUNNING)
289 info->running = true;
290 break;
291
292 case SWITCHTEC_FW_PART_ID_G3_IMG1:
293 active_addr = __gas_read32(dev, &fi->active_img.address);
294 set_fw_info_part(dev, info, &fi->img1);
295
296 val = __gas_read16(dev, &si->img_running);
297 if (val == SWITCHTEC_IMG1_RUNNING)
298 info->running = true;
299 break;
300
301 case SWITCHTEC_FW_PART_ID_G3_DAT0:
302 active_addr = __gas_read32(dev, &fi->active_cfg.address);
303 set_fw_info_part(dev, info, &fi->cfg0);
304
305 val = __gas_read16(dev, &si->cfg_running);
306 if (val == SWITCHTEC_CFG0_RUNNING)
307 info->running = true;
308 break;
309
310 case SWITCHTEC_FW_PART_ID_G3_DAT1:
311 active_addr = __gas_read32(dev, &fi->active_cfg.address);
312 set_fw_info_part(dev, info, &fi->cfg1);
313
314 val = __gas_read16(dev, &si->cfg_running);
315 if (val == SWITCHTEC_CFG1_RUNNING)
316 info->running = true;
317 break;
318
319 case SWITCHTEC_FW_PART_ID_G3_NVLOG:
320 set_fw_info_part(dev, info, &fi->nvlog);
321 break;
322
323 default:
324 return -EINVAL;
325 }
326
327 if (info->part_addr == active_addr)
328 info->active = true;
329
330 return 0;
331}
332
333int gasop_event_summary(struct switchtec_dev *dev,
334 struct switchtec_event_summary *sum)
335{
336 int i;
337 uint32_t reg;
338
339 if (!sum)
340 return 0;
341
342 memset(sum, 0, sizeof(*sum));
343
344 sum->global = gas_reg_read32(dev, sw_event.global_summary);
345 sum->part_bitmap = gas_reg_read64(dev, sw_event.part_event_bitmap);
346
347 for (i = 0; i < dev->partition_count; i++) {
348 reg = gas_reg_read32(dev, part_cfg[i].part_event_summary);
349 sum->part[i] = reg;
350 if (i == dev->partition)
351 sum->local_part = reg;
352 }
353
354 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
355 reg = gas_reg_read16(dev, pff_csr[i].vendor_id);
356 if (reg != MICROSEMI_VENDOR_ID)
357 break;
358
359 sum->pff[i] = gas_reg_read32(dev, pff_csr[i].pff_event_summary);
360 }
361
362 return 0;
363}
364
365static uint32_t __gas *global_ev_reg(struct switchtec_dev *dev,
366 size_t offset, int index)
367{
368 return (void __gas *)&dev->gas_map->sw_event + offset;
369}
370
371static uint32_t __gas *part_ev_reg(struct switchtec_dev *dev,
372 size_t offset, int index)
373{
374 return (void __gas *)&dev->gas_map->part_cfg[index] + offset;
375}
376
377static uint32_t __gas *pff_ev_reg(struct switchtec_dev *dev,
378 size_t offset, int index)
379{
380 return (void __gas *)&dev->gas_map->pff_csr[index] + offset;
381}
382
383#define EV_GLB(i, r)[SWITCHTEC_GLOBAL_EVT_ ## i] = \
384 {offsetof(struct sw_event_regs, r), global_ev_reg}
385#define EV_PAR(i, r)[SWITCHTEC_PART_EVT_ ## i] = \
386 {offsetof(struct part_cfg_regs, r), part_ev_reg}
387#define EV_PFF(i, r)[SWITCHTEC_PFF_EVT_ ## i] = \
388 {offsetof(struct pff_csr_regs, r), pff_ev_reg}
389
390static const struct event_reg {
391 size_t offset;
392 uint32_t __gas *(*map_reg)(struct switchtec_dev *stdev,
393 size_t offset, int index);
394} event_regs[] = {
395 EV_GLB(STACK_ERROR, stack_error_event_hdr),
396 EV_GLB(PPU_ERROR, ppu_error_event_hdr),
397 EV_GLB(ISP_ERROR, isp_error_event_hdr),
398 EV_GLB(SYS_RESET, sys_reset_event_hdr),
399 EV_GLB(FW_EXC, fw_exception_hdr),
400 EV_GLB(FW_NMI, fw_nmi_hdr),
401 EV_GLB(FW_NON_FATAL, fw_non_fatal_hdr),
402 EV_GLB(FW_FATAL, fw_fatal_hdr),
403 EV_GLB(TWI_MRPC_COMP, twi_mrpc_comp_hdr),
404 EV_GLB(TWI_MRPC_COMP_ASYNC, twi_mrpc_comp_async_hdr),
405 EV_GLB(CLI_MRPC_COMP, cli_mrpc_comp_hdr),
406 EV_GLB(CLI_MRPC_COMP_ASYNC, cli_mrpc_comp_async_hdr),
407 EV_GLB(GPIO_INT, gpio_interrupt_hdr),
408 EV_GLB(GFMS, gfms_event_hdr),
409 EV_PAR(PART_RESET, part_reset_hdr),
410 EV_PAR(MRPC_COMP, mrpc_comp_hdr),
411 EV_PAR(MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
412 EV_PAR(DYN_PART_BIND_COMP, dyn_binding_hdr),
413 EV_PFF(AER_IN_P2P, aer_in_p2p_hdr),
414 EV_PFF(AER_IN_VEP, aer_in_vep_hdr),
415 EV_PFF(DPC, dpc_hdr),
416 EV_PFF(CTS, cts_hdr),
417 EV_PFF(UEC, uec_hdr),
418 EV_PFF(HOTPLUG, hotplug_hdr),
419 EV_PFF(IER, ier_hdr),
420 EV_PFF(THRESH, threshold_hdr),
421 EV_PFF(POWER_MGMT, power_mgmt_hdr),
422 EV_PFF(TLP_THROTTLING, tlp_throttling_hdr),
423 EV_PFF(FORCE_SPEED, force_speed_hdr),
424 EV_PFF(CREDIT_TIMEOUT, credit_timeout_hdr),
425 EV_PFF(LINK_STATE, link_state_hdr),
426};
427
428static uint32_t __gas *event_hdr_addr(struct switchtec_dev *dev,
429 enum switchtec_event_id e,
430 int index)
431{
432 size_t off;
433
434 if (e < 0 || e >= SWITCHTEC_MAX_EVENTS)
435 return NULL;
436
437 off = event_regs[e].offset;
438
439 if (event_regs[e].map_reg == part_ev_reg) {
440 if (index < 0)
441 index = dev->partition;
442 else if (index >= dev->partition_count)
443 return NULL;
444 } else if (event_regs[e].map_reg == pff_ev_reg) {
445 if (index < 0 || index >= SWITCHTEC_MAX_PFF_CSR)
446 return NULL;
447 }
448
449 return event_regs[e].map_reg(dev, off, index);
450}
451
452static int event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e,
453 int index, int flags, uint32_t data[5])
454{
455 int i;
456 uint32_t __gas *reg;
457 uint32_t hdr;
458
459 reg = event_hdr_addr(dev, e, index);
460 if (!reg) {
461 errno = EINVAL;
462 return -errno;
463 }
464
465 hdr = __gas_read32(dev, reg);
466 if (data)
467 for (i = 0; i < 5; i++)
468 data[i] = __gas_read32(dev, &reg[i + 1]);
469
470 if (!(flags & SWITCHTEC_EVT_FLAG_CLEAR))
471 hdr &= ~SWITCHTEC_EVENT_CLEAR;
472 if (flags & SWITCHTEC_EVT_FLAG_EN_POLL)
473 hdr |= SWITCHTEC_EVENT_EN_IRQ;
474 if (flags & SWITCHTEC_EVT_FLAG_EN_LOG)
475 hdr |= SWITCHTEC_EVENT_EN_LOG;
476 if (flags & SWITCHTEC_EVT_FLAG_EN_CLI)
477 hdr |= SWITCHTEC_EVENT_EN_CLI;
478 if (flags & SWITCHTEC_EVT_FLAG_EN_FATAL)
479 hdr |= SWITCHTEC_EVENT_FATAL;
480 if (flags & SWITCHTEC_EVT_FLAG_DIS_POLL)
481 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
482 if (flags & SWITCHTEC_EVT_FLAG_DIS_LOG)
483 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
484 if (flags & SWITCHTEC_EVT_FLAG_DIS_CLI)
485 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
486 if (flags & SWITCHTEC_EVT_FLAG_DIS_FATAL)
487 hdr &= ~SWITCHTEC_EVENT_FATAL;
488
489 if (flags)
490 __gas_write32(dev, hdr, reg);
491
492 return (hdr >> 5) & 0xFF;
493}
494
495int gasop_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e,
496 int index, int flags, uint32_t data[5])
497{
498 int nr_idxs;
499 int ret = 0;
500
501 if (e >= SWITCHTEC_MAX_EVENTS)
502 goto einval;
503
504 if (index == SWITCHTEC_EVT_IDX_ALL) {
505 if (event_regs[e].map_reg == global_ev_reg)
506 nr_idxs = 1;
507 else if (event_regs[e].map_reg == part_ev_reg)
508 nr_idxs = dev->partition_count;
509 else if (event_regs[e].map_reg == pff_ev_reg)
510 nr_idxs = gas_reg_read8(dev, top.pff_count);
511 else
512 goto einval;
513
514 for (index = 0; index < nr_idxs; index++) {
515 ret = event_ctl(dev, e, index, flags, data);
516 if (ret < 0)
517 return ret;
518 }
519 } else {
520 ret = event_ctl(dev, e, index, flags, data);
521 }
522
523 return ret;
524
525einval:
526 errno = EINVAL;
527 return -errno;
528}
529
530int gasop_event_wait_for(struct switchtec_dev *dev,
531 enum switchtec_event_id e, int index,
532 struct switchtec_event_summary *res,
533 int timeout_ms)
534{
535 struct timeval tv;
536 long long start, now;
537 struct switchtec_event_summary wait_for = {0};
538 int ret;
539
540 ret = switchtec_event_summary_set(&wait_for, e, index);
541 if (ret)
542 return ret;
543
544 ret = switchtec_event_ctl(dev, e, index,
545 SWITCHTEC_EVT_FLAG_CLEAR |
546 SWITCHTEC_EVT_FLAG_EN_POLL,
547 NULL);
548 if (ret < 0)
549 return ret;
550
551 ret = gettimeofday(&tv, NULL);
552 if (ret)
553 return ret;
554
555 now = start = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
556
557 while (1) {
558 ret = switchtec_event_check(dev, &wait_for, res);
559 if (ret < 0)
560 return ret;
561
562 if (ret)
563 return 1;
564
565 ret = gettimeofday(&tv, NULL);
566 if (ret)
567 return ret;
568
569 now = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
570
571 if (timeout_ms > 0 && now - start >= timeout_ms)
572 return 0;
573
574 usleep(5000);
575 }
576}
GAS Accessor functions.
int switchtec_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e, int index, int flags, uint32_t data[5])
Enable, disable and clear events or retrieve event data.
Definition platform.c:313
int switchtec_event_summary_set(struct switchtec_event_summary *sum, enum switchtec_event_id e, int index)
Set a bit corresponding to an event in a summary structure.
Definition events.c:175
int switchtec_event_check(struct switchtec_dev *dev, struct switchtec_event_summary *chk, struct switchtec_event_summary *res)
Check if one or more events have occurred.
Definition events.c:297
Event summary bitmaps.
Definition switchtec.h:289
uint64_t part_bitmap
Bitmap of partitions with active events.
Definition switchtec.h:291
uint64_t global
Bitmap of global events.
Definition switchtec.h:290
unsigned part[SWITCHTEC_MAX_PARTS]
Bitmap of events in each partition.
Definition switchtec.h:295
unsigned local_part
Bitmap of events in the local partition.
Definition switchtec.h:292
unsigned pff[SWITCHTEC_MAX_PFF_CSR]
Bitmap of events in each port function.
Definition switchtec.h:298
Information about a firmware image or partition.
Definition switchtec.h:252
size_t part_addr
Address of the partition.
Definition switchtec.h:257
size_t part_len
Length of the partition.
Definition switchtec.h:258
switchtec_event_id
Enumeration of all possible events.
Definition switchtec.h:304